Practical Mechanism for Fault-Tolerant Spiking Neural Networks via Simple Input Control Based on Learnable Fragmentation

Spiking Neural Networks (SNNs) are regarded as the third generation of neural networks, offering energy-efficient computing for neuromorphic devices. Despite this benefit, hardware-implemented SNNs are vulnerable to hardware faults, which severely degrade their performance. Previous approaches have required direct access to internal SNN circuits to modify weights or monitor internal states, limiting their practicality. Improving robustness to hardware faults without such access remains challenging. To overcome this challenge, we propose a fault-tolerant mechanism that operates only through input data control. Hardware faults reduce the usable learning capacity of SNNs, resulting in a mismatch between the instantaneous input load and the degraded network dynamics. Our mechanism mitigates this mismatch by dividing each input sample into multiple fragments, redistributing the input load via a learnable fragmentation strategy. The strategy learns two key fragmentation components: 1) division boundaries and 2) the number of fragments. To our knowledge, this is the first mechanism to improve the fault tolerance of SNNs without accessing the internal circuits. Experimental results demonstrate that our mechanism consistently outperforms previous methods in various SNN models, achieving these gains without direct access to internal circuits. Furthermore, we validate its effectiveness on SNNs implemented with a physical FPGA platform, confirming its practicality.

Spiking Neural Networks (SNNs) are an energy-efficient form of artificial intelligence inspired by how biological neurons in the human brain operate. Instead of sending continuous numbers at every moment, they send short events called spikes. This makes them attractive for small, low-power systems such as sensors, robots, and edge devices. Yet when SNNs are built in hardware, some electronic components can fail. A connection may become stuck at a fixed value, fluctuate unexpectedly, or connect incorrectly. These faults can severely damage learning and prediction. Most existing fault-tolerance methods for neuromorphic devices, which are based on SNNs, assume that we can inspect or modify the hardware internally, for example, by changing weights, avoiding broken connections, rerouting signals, or monitoring neuron activity. That assumption is often unrealistic. This is because many neuromorphic devices and deployed accelerators provide only limited access to their internal circuits, and adding full reconfiguration increases cost and complexity. Therefore, this paper asks a practical question: can we make a faulty SNN more reliable without touching its internal circuits? We identify a simple but important cause of failure. Hardware faults reduce SNNs’ usable learning capacity. When many synaptic connections are ruined, neuronal states can be pushed far away from the useful range where learning signals remain strong. In ordinary terms, the damaged SNN becomes overloaded: each input arrives with more immediate information than it can reliably absorb. We call this a bottleneck problem. Instead of repairing SNNs internally, the proposed method reduces the load by adjusting outside of the devices. Our method controls only the input data. Each input example, such as an image or sensor signal, is divided into several smaller fragments and fed to the SNN over time. This is similar to sending a large file through a busy communication network in smaller packets rather than all at once. By spreading one input across multiple moments, each step carries less information, so faulty neurons are less likely to enter unstable states where learning nearly disappears. The splitting strategy is not fixed by hand. It learns where to divide the input and how many fragments to use; it can adapt to the dataset, the model, and the fault level. The method also encourages the fragments to carry balanced amounts of input energy, preventing one fragment from containing almost all useful information while the others contain very little. After the fragments are processed, the SNN combines its output spikes over time and gives greater weight to moments when the prediction is more confident. These choices keep the approach simple: the internal spiking circuit does not need to be monitored, rewired, or modified. Our experimental results show that the proposed mechanism improves fault tolerance across several SNN models, including spiking Multi-Layered Perceptron (MLP), VGG, ResNet, and transformer. It is evaluated on image, activity-recognition, and audio datasets, and under multiple fault types, including stuck-at faults, random weight faults, and connectivity errors. Across these settings, the proposed method generally preserves higher accuracy than prior approaches. We also test it on real Field-Programmable Gate Array (FPGA) hardware, where it again improves accuracy without direct access to internal SNN circuits. The broader impact is that fault tolerance can be moved from inside neuromorphic devices to the input interface. A lightweight external controller can reshape data before it enters the device, making the approach more compatible with off-the-shelf or restricted neuromorphic hardware. As SNNs are considered for low-power edge intelligence, always-on sensing, and embedded learning, this work offers a practical route toward making them more dependable under real hardware faults.