DSBRouter: End-to-end Global Routing via Diffusion Schr\"{o}dinger Bridge

Global routing (GR) is a fundamental task in modern chip design and various learning techniques have been devised. However, a persistent challenge is the inherent lack of a mechanism to guarantee the routing connectivity in network's prediction results, necessitating post-processing search or reinforcement learning (RL) to enforce the connectivity. In this paper, we propose a neural GR solver called DSBRouter, leveraging the Diffusion Schr\"{o}dinger Bridge (DSB) model for GR. During training, unlike previous works that learn the mapping from noise to routes, we establish a bridge between the initial pins and the routing via DSB, which learns the forward and backward mapping between them. For inference, based on the evaluation metric (e.g. low overflow), we further introduce a sampling scheme with evaluation-based guidance to enhance the routing predictions. Note that DSBRouter is an end-to-end model that does not require a post-step to ensure connectivity. Empirical results show that it achieves SOTA performance on the overflow reduction in ISPD98 and part of ISPD07. In some cases, DSBRouter can even generate routes with zero overflow.

Modern chips contain millions of tiny wires that must be routed without crossing or overflow. Existing algorithms—and even recent machine-learning routers—still need slow, hand-tuned post-processing to make all wires connect, so designers lose days iterating on congestion fixes. Our research introduces DSBRouter, the first end-to-end neural global router. It builds on the Diffusion Schrödinger Bridge framework to learn both a “forward” path (from routes to clean layouts) and a “backward” path (from pins to finished routes), then refines each intermediate layout with an evaluation-guided sampler that explicitly reduces overflow. In public ISPD benchmarks, DSBRouter cut routing overflow by an average of 90%—and sometimes eliminated it entirely—while matching or even beating prior methods on wire length, all without any post-processing steps.By removing a critical manual bottleneck, DSBRouter can shorten chip design cycles, lower engineering costs, and pave the way for fully automated, AI-driven electronic design automation pipelines.