Predicting the number of processor clock cycles it takes to execute a block of assembly instructions in steady state (the throughput) is important for both compiler designers and performance engineers. Building an analytical model to do so is especially complicated in modern x86-64 Complex Instruction Set Computer (CISC) machines with sophisticated processor microarchitectures in that it is tedious, error prone, and must be performed from scratch for each processor generation.
In this paper, we present Ithemal, the first tool which learns to predict the throughput of a set of instructions. Ithemal uses a hierarchical LSTM--based approach to predict throughput based on the opcodes and operands of instructions in a basic block. We show that Ithemal is more accurate than state-of-the-art hand-written tools currently used in compiler backends and static machine code analyzers. In particular, our model has less than half the error of state-of-the-art analytic models (LLVM's llvm-mca and Intel's IACA). Ithemal is also able to predict these throughput values at a faster rate than the aforementioned tools, and is easily ported across a variety process microarchitectures with minimal developer effort.
Charith Mendis (MIT)
Alex Renda (MIT)
Dr.Saman Amarasinghe (Massachusetts institute of technology)
Michael Carbin (MIT)
Related Events (a corresponding poster, oral, or spotlight)
2019 Poster: Ithemal: Accurate, Portable and Fast Basic Block Throughput Estimation using Deep Neural Networks »
Tue Jun 11th 06:30 -- 09:00 PM Room Pacific Ballroom
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